A common problem that will happen when you are penalizing Eagle boards is the name will increase it's number instead of keep the same, for example, when you have U1 named IC in your first PCB board, and no more U2, U3 in this board. So when you done the penalization you will see U2 instead of U1 in the copied board. The following steps will overcome this problem.
- Open your brd file which you to penalizing
- Run script "penalizing.ulp" to copy the layer 25 which are tNames into 125, so when you copy and paste the board, the parts names on the board which not automatically changed in layer 125, but still changed in layer 25
(Now this step can be directly now by click "tool - penalize" in the menu)
- After the above steps, use layer 125 instead of 25 in the following steps, but still can use 25 layer for designing.
- Now just copy all of the board, use "group" command to select all and "copy"
- Do command - "menu" - "file" - "new", now you should have a new brd empty file opened
- Do command "paste", and paste again and again untill you reach a fixed size like 5*5 or 10*10 as you except to penalizing for. Use the dimension command to check it. For V-cut, 0.3mm is necessary space between each pasted board.
- You can see the wrong part "name" in layer 25, so when you output them, use layer 125 instead of 25
- Go next step to make Gerber file. When you output gerber_rs274, in the silk screen CMP section, de-select layer 25 and select layer 125
- Text Size: 1 mm standard, or 0.8 smaller and 1.2 bigger size.
- Trace Width: vary from 8 mil to 16 mil, power line can be big and signal line can be small.
- Distance to the board edge: 12 mils
- Trace space: 8 mil or 6 mil is no problem too