What do FPGA can do?
This is all refer from book The design warrior's guide of FPGA. you can download it from here.
To be just a tad more specific, FPGAs are currently eating into four major market segments: ASIC and custom silicon, DSP, embedded microcontroller applications, and physical layer communication chips. Furthermore, FPGAs have created a new market in their own right: reconfigurable computing (RC).
ASIC and custom silicon: As was discussed in the previous section, today’s FPGAs are increasingly being used to implement a variety of designs that could previously have been realized using only ASICs and custom silicon.
Digital signal processing: High-speed DSP has traditionally been implemented using specially tailored microprocessors called digital signal processors (DSPs). However, today’s FPGAs can contain embedded multipliers, dedicated arithmetic routing, and large amounts of on-chip RAM, all of which facilitate DSP operations. When these features are coupled with the massive parallelism provided by FPGAs, the result is to outperform the fastest DSP chips by a factor of 500 or more.
Embedded microcontrollers: Small control functions have traditionally been handled by special-purpose embedded processors called microcontrollers. These low cost devices contain on-chip program and instruction memories, timers, and I/O peripherals wrapped around a processor core. FPGA prices are falling, however, and even the smallest devices now have more than enough
capability to implement a soft processor core combined with a selection of custom I/O functions. The end result is that FPGAs are becoming increasingly attractive for embedded control applications.
Physical layer communications: FPGAs have long been used to implement the glue logic that interfaces between physical layer communication chips and high-level networking protocol layers. The fact that today’s high-end FPGAs can contain multiple high-speed transceivers means that communications and networking functions can be consolidated into a single device.
Reconfigurable computing: This refers to exploiting the inherent parallelism and reconfigurability provided by FPGAs to “hardware accelerate” software algorithms. Various companies are currently building huge FPGA-based reconfigurable computing engines for tasks ranging from hardware simulation to cryptography analysis to discovering new drugs.
FPGA Resouces, Architecture
Altera MAX 10
- Download software from here. https://www.altera.com/downloads/download-center.html (V16 version is about 3 GB!, full installation about 11GB )
- File:STEP-MAX10-Software-Manual-1.0.pdf, File:STEP-MAX10-Hardware-Manual-1.0.pdf
- Compare Guide (Reference from Max10 overview PDF)
|Logic resource (LE)||2000||8000||8000||7680?|
|User Flash||12KB||32-90KB||32-172KB (1376 Kbit)||6000 Kbit?|
|Internal RAM (M9K Memory (Kb))||108Kb||378Kb||378Kb||128Kbit?|
|External storage||Only SRAM||Only SRAM||?|
|Internal Configuration Image||Single Image||Dual Image||Dual Image|
|MCU Software Core||-||8051（100M speed frequency）, Arm Cortex M0||8051（100M speed frequency）、Arm Cortex M0、Nios II|
Quartus Use Guidelines
- Setup projects, devices, devices and pin options (unused pins -> all input tri-stated, voltage 3.3V LVTTL)
- Write first Verilog HDL code
- Start -> Start analysis and synthesis (CTRL+K, Processing)
- Netlist reviewers (Tool) -> check RTL viewer
- Pin Plannar (assignment)-> assign pins (CLK_IN -> PIN_J5, LED1 -> PIN_K11, LED2 -> PIN_N15, rst_n_in -> PIN_J9)
- Start Complilation (CTRL+L,Processing)
- Programmer (Tool)
- Google - MAX10 Device Overview
- Google - MAX10 Device architecture
- Google - MAX10 Design guidelines
- Google - MAX10 Datasheet