M.2 Pins

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Revision as of 02:35, 10 September 2021 by Chao (talk | contribs) (Created page with "== M.2 dual module key A and E == Pin id. Pin name Description * 1 GND Ground * 2 +3.3V 3.3 V power supply * 3 USB_D+ USB high-, full-, and low- speed data pair positive * 4...")
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M.2 dual module key A and E

Pin id. Pin name Description

  • 1 GND Ground
  • 2 +3.3V 3.3 V power supply
  • 3 USB_D+ USB high-, full-, and low- speed data pair positive
  • 4 +3.3V 3.3 V power supply
  • 5 USB_D- USB high-, full-, and low- speed data pair negative
  • 6 LED1#
  • 7 GND Ground
  • 8 Key Substrate removed to act as physical key
  • 9 Key Substrate removed to act as physical key
  • 10 Key Substrate removed to act as physical key
  • 11 Key Substrate removed to act as physical key
  • 12 Key Substrate removed to act as physical key
  • 13 Key Substrate removed to act as physical key
  • 14 Key Substrate removed to act as physical key
  • 15 Key Substrate removed to act as physical key
  • 16 LED2#
  • 17 DNC Do not connect
  • 18 GND Ground
  • 19 DNC Do not connect
  • 20 DNC Do not connect
  • 21 DNC Do not connect
  • 22 DNC Do not connect
  • 23 Key Substrate removed to act as physical key
  • 24 Key Substrate removed to act as physical key
  • 25 Key Substrate removed to act as physical key
  • 26 Key Substrate removed to act as physical key
  • 27 Key Substrate removed to act as physical key
  • 28 Key Substrate removed to act as physical key
  • 29 Key Substrate removed to act as physical key
  • 30 Key Substrate removed to act as physical key
  • 31 Key Substrate removed to act as physical key
  • 32 DNC Do not connect
  • 33 GND Ground
  • 34 DNC Do not connect
  • 35 PETp0 PCI Express lane 0 module transmitter pair positive
  • 36 DNC Do not connect
  • 37 PETn0 PCI Express lane 0 module transmitter pair negative
  • 38 Vendor defined
  • 39 GND Ground
  • 40 Vendor defined
  • 41 PERp0 PCI Express lane 0 module receiver pair positive
  • 42 Vendor defined
  • 43 PERn0 PCI Express lane 0 module receiver pair negative
  • 44 COEX3 Antenna coexistence signal 3
  • 45 GND Ground
  • 46 COEX2 Antenna coexistence signal 2
  • 47 PEFCLKP0 PCI Express reference clock pair positive
  • 48 COEX1 Antenna coexistence signal 1
  • 49 PEFCLKN0 PCI Express reference clock pair negative
  • 50 SUSCLK 32.768 kHz clock module input
  • 51 GND Ground
  • 52 PERST0# PCI Express reset
  • 53 CLKREQ0# PCI Express clock request
  • 54 W_DISABLE2# Wireless disable 2
  • 55 PEWake0# PCI Express wake
  • 56 W_DISABLE1# Wireless disable 1
  • 57 GND Ground
  • 58 SMB_DATA SMBus data signal
  • 59 Reserved
  • 60 SMB_CLK SMBus clock signal
  • 61 Reserved
  • 62 ALERT# SMBus alert signal
  • 63 GND Ground
  • 64 Reserved
  • 65 Reserved
  • 66 UIM_SWP
  • 67 Reserved
  • 68 UIM_POWER_SNK
  • 69 GND Ground
  • 70 UIM_POWER_SRC
  • 71 Reserved
  • 72 +3.3V 3.3 V power supply
  • 73 Reserved
  • 74 +3.3V 3.3 V power supply
  • 75 GND Ground