Description
- High Performance 10/100 Ethernet Transceiver (PHY)
- Ultra low power design with single 3.3V supply
- The RMII interface greatly reduces the control pin of the MCU
- Support HP Auto-MIDX
- The chip is available in a 24-pin QFN package (4×4 mm), lead-free
- Flexible power management architecture
- Integrated 1.2V regulator
- IO voltage range: +1.6V to +3.6V
- Fully pin compatible with ESP32 devkitc board. Only 12 pins used.
Extra features for ESP32 Devkitc:
- Configurable jumper
- CLK pin connect to ESP32 IO0
- CLK pull up resistor
- PHY_X-power (crystal power enable) pin connect ESP IO17
- PHY_X-power pull up resistor.
- Only CLK to IO0 jumper connected during our test. PHY_X-power is not connected and controlled by IO17.
- During boot, could have problem to enter into flash mode, please try to press a few times to restart.
- Tested based on official ESP-IDF ethernet example.
Application areas:
- Embedded server, development board Ethernet interface
Demo video using with ESP32 please see here. Configuration please see here.
Felix –
Board works well, but wiki page is wrong (MDIO is connected to IO18, not IO19). Also, I had to remove the capacitor C15 from my ESP32-DevKitC to get the clock signal to work (as stated here: https://github.com/espressif/esp-idf/blob/master/docs/en/get-started/get-started-devkitc.rst#note-on-c15).
Chao (store manager) –
Thanks for the review, should be a writing error on wiki, will fix it. The board boot of the clock signal is conflicted with esp32 IO0, we leave it a flexible design, because we are not sure how to fix it 100%. Thanks.